By Dirk Stroobandt
The roots of this publication, and of the recent study box that it defines, lie within the scaling of VLSI know-how. With gigahertz procedure clocks and ever accelerating layout and procedure suggestions, interconnects became the restricting issue for either functionality and density. This expanding influence of interconnects at the approach implementation house necessitates new instruments and analytic recommendations to aid the approach fashion designer. With appreciate to modeling and research, the reaction to interconnect dom inance is evolutionary. Atomistic- and grain-level types of interconnect constitution, and function versions at multi-gigahertz working frequencies, jointly advisor the choice of stronger fabrics and approach applied sciences (e. g. , damascene copper wires, low-permittivity dielectrics). formerly in major results (e. g. , mutual inductance) are further into functionality mod els, as older approximations (e. g. , lumped-capacitance gate load versions) are discarded. despite the fact that, on the system-level and chip making plans point, the mandatory reaction to interconnect dominance is innovative. Convergent layout flows don't require simply dispensed RLC line types, repeater expertise, unifi cations with extraction and research, and so forth. particularly, matters corresponding to wiring layer project, and early prediction of the source and function envelope for the approach interconnect (in specific, in line with statistical types of the process interconnect structure), additionally turn into serious. certainly, system-level interconnect prediction has emerged because the enabler of more desirable interconnect modeling, less costly procedure architectures, and extra efficient layout technology.
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Extra resources for A Priori Wire Length Estimates for Digital Design
Summary In this introductory chapter, I have situated the research work of this book within the world of digital design, more specifically in the transition from logical structure to physical structure of the design. As the principal goal, OvelView 29 I have chosen to search for more accurate (theoretical) models for a priori wire length estimations in computer systems. The three main models for this research have been presented: a model for the circuit, one for the physical architecture, and a third one for the layout generation.
Routing must be performed under strict performance criteria. To satisfy the requirements, the CAD programs can benefit from using wire length estimations. Based on these estimations, one can also make statements on the quality of a certain MCM architecture. 5. OVERVIEW OF PUBLISHED WORK From the previous section, it seems that wire length estimations have a whole range of possible applications and are becoming more important. In this section, I present an overview of the most important publications in the domain of wire length estimations.
I return to this issue extensively in chapter 3. 4. 2. Schematic model for the physical architecture. MODEL FOR THE ARCIDTECTURE In the previous section we discussed the circuit model. However, the length of a circuit interconnection only gets its meaning after the placement of the circuit in a physical architecture.