By T. Watanabe (auth.), Thiruvalam K. S. Murthy, Carlos A. Brebbia (eds.)
This booklet comprises chapters written by means of eminent scientists at the newest improvement in machine expertise and applica- tions in Japan. the target of the publication is to supply an information of the significant advances being made by means of Japane- se scientists at the common quarter of data expertise and within the so-called 5th new release computers. within the first bankruptcy, Watanabe of the NEC company, descri- bes complex structure and expertise of supercomputing platforms. This topic is via Nakamura of Tohoku Uni- versity within the subsequent bankruptcy. one other kind of supercomputer for vector processing, the FACOM vice chairman 2000 sequence is then des- cribed via Uchida ofFujitsu Ltd in bankruptcy three. specialist structures are provided within the subsequent chapters via Ue- no and Oomari of Tokyo Denki collage and through Koseki and Goto of the NEC company. vital functions in com- puter photographs are defined in bankruptcy Six through Ishii and Mu- rakami of Fujitsu Laboratories. Hayahi from an identical Labora- tory then discusses neurocomputers in Japan. the ultimate chap- ter through Noguchi of Tohoku Universityillustrates an enormous software in communications.
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Extra resources for Advances in Computer Technology and Applications in Japan
5 I ) «). 5) ( 0, (VP2000 O. , IlULTIPLY ADD J VECTOR ILOGICAL r-' ,.... c::7 SYSTEI STORAG! UNIT .. 3 Specification; The top model VP2600 has the total Vecter Register capacity of 128KB(64word x 8byte x 256). To make the best utilization of the total capacity, for example, the Vecter Registers may be concatinated to take the following configurations: 64(length) x 256(total number), 128 x 128, 256 x 64, ..... , 2048 x 8. The length of Vecter Register is specified by a Vector Control Register, and can be altered by an instruction in the program.
Fig. 8. SX-2 System Configuration. input vector output I,-~ _-,-'--,2'~1~ ,--I input ~-2 . 1 --------- veclOr 84 t- + + + ~ H--1'_--1'--1'--1 2 1I n ) + ) (0) single pipeline 5 I R 6 2 H 7 3 I=l vector output vector r r r ----- 3 -2 ----- 0-1 t- • 5 1 6 2 7 3 8 4 (bl parollel pipeline input vector output vector O°--f' 0-) . ~-z -I --- ------- + 5 I ~ 6 2 ~ t- ---1 t- 7 3 8 4 ~ + ~-) -2 . n-I '-- ----- -- -- (el multiple-porallel pipeline Fig. 9. J) II 0 0 o 0 Distonce (3) LISt (,nd,rect) vector doto IX(I) Index list AOX(i)) (4) )' 0 • \ " I ----------- ~ b -- ----- 0 Vector compression A Vector mask 8 (5) Vector exponson A Vector mask I I , 8 (6) Vector mask operations F·-·F·' A + 8 Vector mask C I I ( 0,+ .
FACOM VP2000 Series K. Uchida Supercomputer Department, Mainframe Division, Fujitsu Limited 1015, K amikodanaka N akahara-ku, Kawasaki 211, Japan VP2000 series is the supercomputer which attains the maximum performacnce up to 4GFLOPS. With this high performance, VP2000 series is one of the world's highest performance machine as a un i-processor system. In this paper, we would I ike to introduce the VP2000 series mainly about following items -Development of Fujitsu's supercomputer -Hardware features -Enhancement of vector and scalar performance -Dual-scalar processor system -Enhancement on main-storage and channel-processor -LSI technology, high-density packaging, cooling system -Enhancement on software (UNIX system) -Flexible system KEY WORD; SUPERCOMPUTER, VECTOR PROCESSOR, VP2000 SERI ES, DUAL SCALAR PROCESSOR 1.